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Performance Based Improvement of the CPU by reducing the Real-Time Interrupt Latency using the PPTS Algorithm

IMS Manthan (The Journal of Mgt., Comp. Science & Journalism)

Volume 8 Issue 2

Published: 2013
Author(s) Name: Lavanya Dhanesh, P. Murugesan
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Abstract

The main objective of the research is to improve the performance of the CPU at software level by reducing the Interrupt Latency of the Real time systems. Interrupt Latency provides an important metric in increasing the performance of the Real Time Kernal. So far the research has been investigated with respect to real-time interrupt latency reduction using non-pre-emptive task scheduling algorithms. A general disadvantage of the non-preemptive discipline is that it introduces additional blocking time in higher priority tasks, so reducing schedulability. If the interrupt latency is increased, the task switching delay shall be increasing with respect to each task. Hence most of the research work has been focussed to reduce interrupt latency by using the Pre-emptive Task scheduling algorithm. Based on the literature survey, A Deadline Monotonic Priority Assignment technique is used to reduce the latency with respect to the deadline. Deferred pre-emption scheduling and Fixed pre-emptive scheduling algorithm are used to reduce the interrupt latencies based on the queue fixed to the priority of the tasks to be handled. Here we suggest a new algorithm named “Priority Preemptive task scheduling algorithm” which preempts and serve the task with highest priority and also concentrates on the low priority tasks during the buffering time of the higher priority tasks.

Keywords: Interrupt Latency, schedulability, Deadline Monotonic Priority Assignment, Deferred pre-emption scheduling, Fixed pre-emptive scheduling algorithm, Priority Pre-emptive task scheduling algorithm

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