Pre-eminent Performance in a Multi-Cache Memory with all Level Replacement: An Analytical Study
Published: 2013
Author(s) Name: Rasmi Prakash Swain, Debabala Swain, Bijay Paikaray |
Author(s) Affiliation: Dept. of Computer Science & Engg Centurion University of Technology & Management Bhubaneswar, Odisha
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Abstract
Cache memory is a high speed & fast memory. It can
reduce the speed in between memory & processor.
CPU takes the help of different level of cache memory
to find the adequate data. If it not finds the data in level
1 cache. L1 then it access L2. For the assessment of
data different page replacement algorithms are used.
The replacement algorithms which works efficiently
on L1 may not be as efficient on L2. So different
access patterns are required. Cache memory works
with principle called principle of locality. Whenever a
page/word/block is requested from CPU, first of all it is
searched on L1 if the required page is found in L1 it is
a hit else a miss. When L1 is saturated and it is a miss
then a block from L1 is to be evicted to create a space
for the required page. Different page replacement
algorithms such as LRU, LFU and FIFO are used on
various pairs of cache hierarchy for result analysis.
This paper motivates the new researchers to develop
a new novel replacement algorithm that can be tested
with performance superior to other existing algorithms.
Keywords: Multi-cache Performance, All Level Replacement, L1 & L 2 Locality
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